[concurrency-interest] Question about phasers and cache lines
davidcholmes at aapt.net.au
Wed Nov 30 06:08:42 EST 2011
Mohan Radhakrishnan writes:
> I read this in "Phasers: a Unified Deadlock-Free Construct for
> Collective and Point-to-point Synchronization"
> By design, phasers are amenable to scalable implementation
> on multicore SMPs, as demonstrated in Section
> 4." -- > Since it is mentioned I was trying to find out how it works
> better. So this means that it uses lock-free techniques like CAS ??
For j.u.c yes. For the paper you are citing you need to see the
implementations they used.
> and also
> "An activity has the option of registering
> with a phaser in signal-only mode or wait-only
> mode for producer-consumer synchronization, in addition
> to signal-wait mode for barrier synchronization." --> I didn't get how
> to map this to the API.
For the j.u.c.Phaser API:
> On Wed, Nov 30, 2011 at 2:54 PM, David Holmes
> <davidcholmes at aapt.net.au> wrote:
> > Mohan Radhakrishnan writes:
> >> I understand forkjoin has a work stealing algorithm that could be
> >> useful on multicore processors.
> > I think that is somewhat inverted. Parallel decomposition
> techniques benefit
> > from parallel processing - ie from multi-processors or
> multi-cores. Within
> > such a framework work-stealing is just a generic technique to allow
> > otherwise idle threads to continue doing useful work, avoid the need for
> > context switching and thus reduce overhead.
> >> Can anyone point out what facility a
> >> phaser has similarly to work better on multicore processors ? I
> >> couldn't locate anything after a search.
> > Sorry I don't understand the question - "work better" than
> what? A Phaser is
> > a generic synchronization barrier. As with the other j.u.c
> synchronizers it
> > utilizes lock-free techniques to improve scalability on
> > David Holmes
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