[concurrency-interest] volatile guarantee for directbuffer
Holger.Peine at fh-hannover.de
Wed Feb 15 01:58:56 EST 2012
Am 14.02.2012 20:46, schrieb Boehm, Hans:
>> From: Holger Peine
>> (I use to tell my students "writing to a volatile flushes the cache".)
> That somewhat conveys the right idea, but not entirely. In particular:
> - If only v is volatile,
> Furthermore if v is known not to be read by another thread, the write to v can be turned into a non-volatile write.
The hardware cannot know this, I assume - but the compiler could, in
certain cases. I hadn't thought oft that, but yes, the compiler could
"optimize away volatile" in such a cases - good point.
> - The cost model is wrong. Writing to a volatile is typically many orders of magnitude cheaper than what it would take to write the entire cache at full memory bandwidth. It's typically at most a store buffer that's really flushed.
Absolutely - my mnemonic "writing a volatile flushes the cache" is
correct regarding the functionality, but not regarding the performance,
since of course not the whole cache but only the dirty cache lines need
to be flushed.
> I'd instead go with something like "So long as accesses to the same non-volatile variable can't happen at the same time, or are all reads, you get sequential consistency."
That's a bit too complicated for a mnemonic, though - but "more correct"
Prof. Dr. Holger Peine
Hochschule Hannover, Fakultät IV, Abt. Informatik
Tel: +49(511)9296-1830 Fax: -1810 (shared, please state my name)
Ricklinger Stadtweg 120, D-30459 Hannover, Germany
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