[concurrency-interest] UseNUMA

Martin Thompson mjpt777 at gmail.com
Thu Feb 23 15:19:15 EST 2012


This is not my understanding of NUMA for the latter Intel CPU
architectures.  For a system to by NUMA it needs to have multiple CPU
sockets, each with local connected memory, that communicate with each other
over QPI interconnects.  It is the cost of crossing the interconnect to
access memory managed by the other socket where the costs escalate.

The UseNUMA setting is applied when you want the GC to be NUMA aware so
that when collecting memory it happens on a thread socket local to the
thread that created the memory.


> It looks like a mac book with a i7 quadcore is a NUMA chip according to
> http://software.intel.com/en-us/blogs/2009/03/11/learning-experience-of-numa-and-intels-next-generation-xeon-processor-i/
> Is there a way to visualize using thread programs or something else
> the effect of UseNUMA on thread programming ?
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