[concurrency-interest] padding in Exchanger

Ruslan Cheremin cheremin at gmail.com
Tue Jan 17 07:59:00 EST 2012


Oh, so easy... It was comments in code which confuses me -- since it
explicitly refer to this padding as targeted to 64 bytes cache lines
arch. So I was thinking "may be I miss something important here?"

Thank you for clarification!

2012/1/17 Doug Lea <dl at cs.oswego.edu>:
> On 01/17/12 07:47, Ruslan Cheremin wrote:
>>
>> Yes, I understand. I do not understand why -- in current conditions --
>> 128 bytes padding is better then 64 bytes one. Both are not
>> bulletproof, and 64 bytes seems to be enough for arch with 64 cache
>> line...
>
>
> Several common processors (including Intel i7s) are normally run in
> 128byte cache line mode. There are also a few less common processors
> such as recent POWER that normally run with even larger cache lines,
> but until we get better JVM support, the best we can do is target
> the most common cases.
>
> -Doug
>


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