[concurrency-interest] x86 NOOP memory barriers

Nitsan Wakart nitsanw at yahoo.com
Fri Aug 2 05:43:08 EDT 2013

For clarity's sake I'd like an official explanation for the often quoted "all barriers except STORE/LOAD are a no-op on x86" statement from the JMM cookbook.
Can someone (of authority, so I can later say: "But Mr. Authority here says...") please confirm/expand on/deny that while a volatile read or an AtomicLong.lazySet are a CPU noop (in the sense that they are a MOV like any other), they are also compiler instructions. One cannot simply replace a lazySet with a plain write to get the same effect. They might be cheap but they ain't free... 
I would appreciate some more careful wording on this topic.
Many thanks,

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