[concurrency-interest] RFR: 8065804: JEP 171: Clarifications/corrections for fence intrinsics

Stephan Diestelhorst stephan.diestelhorst at gmail.com
Thu Dec 11 09:54:12 EST 2014

On Wednesday 10 December 2014 17:04:17 Oleksandr Otenko wrote:
> ARM/Power then are different. They don't have a way to provide TSO -
> they don't provide synchronization order from JMM. Instead, they can
> only provide program order of stores. The tiny difference in the
> semantics of DMB and MFENCE is that DMB only gives /local/ guarantees -
> the loads and stores in the same thread do not commit until the
> preceding stores were flushed; but MFENCE additionally provides a
> /global/ guarantee that /all threads agree on the order/ of the stores.

You pretty much swapped DMBs and MFENCEs ;)  So MFENCEs are local, in
that they need to drain the write-buffer before allowing a later load
access to the data.  DMBs, on the other hand, at least conceptually need
to make sure that stores from other cores have become visible everywhere
when the local core has seen them before the DMB.


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