[concurrency-interest] Min and Max for Atomics

Andrew Haley aph at redhat.com
Thu Aug 10 14:54:39 EDT 2017

On 10/08/17 19:29, Nathan and Ila Reynolds wrote:
> Every time a core writes to a cache line (normal or atomic), it has to 
> own the cache line in the exclusive state.  If the cache line is not 
> already in the exclusive state, then the core has to send an 
> invalidation message to all other caches in all other cores in the 
> entire system.  This could mean going to another chip or even 7 other 
> chips.  This invalidation message removes the cache line from all other 
> cores.  The invalidating core can stall for a long time if the cache 
> line is heavily contended.  This looks like 100% CPU usage but very 
> sluggish progress.

Oh, I see: you're complaining about the cache line being written and
ping-ponging between all the cores, generating a lot of bus traffic.
Fair enough.  However, it seems to me that your need is fairly specialized
and you've solved it easily enough with a trivial method.

> So, updateAndGet() suffers from cache invalidation even if a write is
> not necessary.  It also suffers from CAS latency and a memory fence.

In theory VarHandles will get you better behaviour, but in practice
HotSpot doesn't yet have the accelerators needed to make this stuff
work without the fences.  It's on my list of things to do.  Mind you,
if you're using x86, the ability to do without the synchronization
won't help much because x86 is TSO anyway.

Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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