[concurrency-interest] Enforcing total sync order on modern hardware
marko at hazelcast.com
Tue Mar 24 16:27:42 EDT 2015
On Tue, Mar 24, 2015 at 9:12 PM, Alexander Terekhov <TEREKHOV at de.ibm.com>
> "Put another way, a system may pass this test and still fail IRIW"
> I don't think so, do you have a real world example?
All it takes is an architecture which doesn't enforce a global TSO for
independent writes, but does for dependent writes. Which, if any, chip has
those semantics I don't know, but its (non)existence certainly doesn't
(dis)prove anything. The tests will not suddenly become inequivalent the
day an architecture appears which differentiates between them.
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